Abstract
dc:description.abstractIn recent decades there has been a rapidly growing demand for high quality, uninterrupted power. In light of this fact, this study has addressed some of the causes of poor power quality and control strategies to ensure a high performance level in inverter-fed power systems. In particular, specific loading conditions present interesting challenges to inverter-fed, high power systems. No-load, unbalanced loading, and non-linear loading each have unique characteristics that negatively influence the performance of the Voltage Source Inverter (VSI). Ideal, infinitely stiff power systems are uninfluenced by loading conditions; however, realistic systems, with finite output impedances, encounter stability issues, unbalanced phase voltage, and harmonic distortion. Each of the loading conditions is presented in detail with a proposed control strategy in order to ensure superior inverter performance. Simulation results are presented for a 90 kVA, 400 Hz VSI under challenging loading conditions to demonstrate the merits of the proposed control strategies. Unloaded or lightly loaded conditions can cause instabilities in inverter-fed power systems, because of the lightly damped characteristic of the output filter. An inner current loop is demonstrated to damp the filter poles at light load and therefore enable an increase in the control bandwidth by an order of magnitude. Unbalanced loading causes unequal phase currents, and consequently negative sequence and zero sequence (in four-wire systems) distortion. A proposed control strategy based on synchronous and stationary frame controllers is shown to reduce the phase voltage unbalance from 4.2% to 0.23% for a 100%-100%-85% load imbalance over fundamental positive sequence control alone. Non-linear loads draw harmonic currents, and likewise cause harmonic distortion in power systems. A proposed harmonic control scheme is demonstrated to achieve near steady state errors for the low order harmonics due to non-linear loads. In particular, the THD is reduced from 22.3% to 5.2% for full three-phase diode rectifier loading, and from 11.3% to 1.5% for full balanced single-phase diode rectifier loading, over fundamental control alone.
Degree
thesis:*- Name thesis:degree_name
- Master of Science
- Level thesis:degree_level
- masters
- Discipline thesis:degree_discipline
- Electrical and Computer Engineering
- Department dc:contributor.department
- Electrical and Computer Engineering
- Grantor dc:publisher
- Virginia Tech
- Year dc:date.issued
- 2001
Author and committee
dc:creator, dc:contributor.*- Author dc:creator
-
- Gannett, Robert Ashley
- Chair dc:contributor.committeechair
-
- Boroyevich, Dushan
- Committee members dc:contributor.committeemember
-
- Chen, Dan Y.
- Lai, Jih-Sheng
Subjects
dc:subject × 5Rights
dc:rights- Statement dc:rights
-
- In Copyright
- Licence dc:rights.uri
Identifiers
dc:identifier.*- Dc Identifier Other
- etd-07302001-133659
- OAI identifier oai:identifier
- oai:vtechworks.lib.vt.edu:10919/34251