Abstract
dc:description.abstractThe small satellite community understands that small satellite missions need to produce two models of the satellite. The flight model is the final model of the spacecraft, which will fly in the space environment. The other, an engineering model, also known as a ”Flat-Sat,” is a lower fidelity prototype of the flight model. For most mission classes, many design alternatives exist for engineering models and tools to build them. However, this is different for Low Earth Orbit (LEO) CubeSats. Some engineering models are cost-prohibitive for these missions, while others need to offer more features to troubleshoot hardware/software-related issues effectively. This thesis presents a design for a FlatSat motherboard, a cost-effective alternative that allows engineers to build and test their design with flight hardware for LEO satellite missions. First, this thesis will cover the motherboard’s schematic capture and PCB design. Then this thesis will cover functional testing of the motherboard itself. Finally, testing will cover the payload control module, a flight computer to manage all of the payloads on the UtProSat-1 CubeSat mission the payload control module (PCM) the payload computer flying on UtProSat-1. Space@VT expects a dramatic increase in reliably testing all satellite features with this motherboard while drastically reducing the cost for future satellite missions at Virginia Tech.
Degree
thesis:*- Name thesis:degree_name
- Master of Science
- Level thesis:degree_level
- masters
- Discipline thesis:degree_discipline
- Electrical Engineering
- Department dc:contributor.department
- Electrical and Computer Engineering
- Grantor dc:publisher
- Virginia Tech
- Year dc:date.issued
- 2023
Author and committee
dc:creator, dc:contributor.*- Author dc:creator
-
- Gibbons, Richard F., III
- Chair dc:contributor.committeechair
-
- Black, Jonathan T.
- Committee members dc:contributor.committeemember
-
- Earle, Gregory D.
- Kenyon, Samantha Parry
Subjects
dc:subject × 2Rights
dc:rights- Statement dc:rights
-
- In Copyright
- Licence dc:rights.uri
- Language dc:language.iso
- en
Identifiers
dc:identifier.*- Handle dc:identifier.uri
- https://hdl.handle.net/10919/118710
- OAI identifier oai:identifier
- oai:vtechworks.lib.vt.edu:10919/118710