Abstract
dc:descriptionWhen conventional von Neumann architectures reference the memory, addressing information must first be obtained, usually by transfer from the memory to the CPU. The work performed by the CPU can be partitioned into a computation process and an access process. Outside of adding addressing modes to instructions, little has been done to reduce the work performed by the access process or to reduce the demands placed on the memory for access-related activities. This work investigates one method of reducing the von Neumann bottleneck and improving the degree of overlap between the computation and access processes.
Degree
thesis:*- Name thesis:degree_name
- Ph.D.
- Level thesis:degree_level
- Dissertation
- Discipline thesis:degree_discipline
- Electrical Engineering
- Grantor
- University of Illinois at Urbana-Champaign
- Year dc:date
- 2014
Author and committee
dc:creator, dc:contributor.*- Author dc:creator
-
- Pleszkun, Andrew Richard
Subjects
dc:subject × 1Identifiers
dc:identifier.*- Identifier
- (UMI)AAI8302963
- OAI identifier oai:identifier
- oai:www.ideals.illinois.edu:2142/69242