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University of Illinois at Urbana-Champaign
Efficient modeling of interconnects and capacitative discontinuities in high-speed digital circuits
Abstract
dc:descriptionItem marked as restricted to the 'UIUC Users [automated]' Group (id=2) by Howard Ding (hding2@illinois.edu) on 2011-05-07T15:05:11Z Item is restricted indefinitely.
Degree
thesis:*- Name thesis:degree_name
- Ph.D.
- Level thesis:degree_level
- Dissertation
- Discipline thesis:degree_discipline
- Engineering, Electronics and Electrical
- Grantor
- University of Illinois at Urbana-Champaign
- Year dc:date
- 2011
Author and committee
dc:creator, dc:contributor.*- Author dc:creator
-
- Oh, Kyung Suk
- Contributors dc:contributor
-
- Schutt-Ainé, José E.
Subjects
dc:subject × 2Rights
dc:rights- Statement dc:rights
-
- Copyright 1995 Oh, Kyung Suk
- Language dc:language
- eng
Identifiers
dc:identifier.*- Identifier
-
AAI9624452
(UMI)AAI9624452 - OAI identifier oai:identifier
- oai:www.ideals.illinois.edu:2142/23544