Abstract
This thesis proposes a design methodology for a self-adaptive controller to realize self-adaptation at chip level. Current system-on-chip design faces numerous problems such as process variation, transistor variability, and degradation effects, which are addressed with custom adaptive and adjustable circuits. These adaptive circuits have low design reuse rates, take a considerable amount of time during the design process, and are closely intertwined with sensors and effectors, hindering technological advancement. The proposed self-adaptive controller addresses the issues of merely adaptive circuits: it solves different adaptation problems, its design is automated by the proposed design methodology, and it connects with different sensors and effectors. The main novelties of the proposed design methodology are employing a machine learning algorithm, namely the learning classifier system XCS, and two different versions of the self-adaptive controller at design time and run time. A machine learning algorithm reduces the design effort, as it automates the process of finding optimal parameter settings. Two different versions, a powerful but complex software version at design time and a lightweight but restricted hardware version at run time, consider the different optimization criteria of the two time periods. Three examples and several experiments show the benefits of the proposed design methodology and the self-adaptive controller. They show how the self-adaptive controller controls the frequency and voltage of a chip, how it adapts to events that have not been foreseen during design time (such as changes in the environment or component failures), how it scales with multi-cores by cooperation without the need for central control, and how it generalizes from restricted learning at design time. Additionally, this thesis extends the current state on XCS theory to cover problems with varying schema order, which is typically encountered in SoC adaptation problems. The thesis thus contributes to both SoC design and learning classifier systems. Lastly, the thesis includes a simulation library, which is based on the industry standard SystemC. The simulation library co-simulates the hardware and software of the SoCs and trains the machine learning algorithm.
Author and committee
dc:creator, dc:contributor.*- Author
-
- Bernauer, Andreas
Identifiers
dc:identifier.*- Identifier
- hdl:10900/49593