Computer Aided Tools for Seamless High Density Interconnects

This thesis presents the tool-set designed to demonstrate the possibility of using the Cadence tools to design, verify and extract circuitry on the substrate along with theon-chip design. This circuitry could be an inter-chip connection that connects twodifferent chips or an intra-chip connection where a long interconnect is taken off fromthe active area of the chip to the substrate and back on to the same chip. To be able to do this task, the work for this project is broadly classified into fourdifferent categories. These are writing The technology file and the display.drf file The Design Rule Check deck The Layout Verses Schematic deck After having completed the above-mentioned tasks, the tool-set was also tested andimplemented on a circuit.

Author dc:creator

• Varma, Ambrish Kant

Advisors dc:contributor.advisor

• Dr. Paul D. Franzon, Chair
• Dr. Eric Rotenberg, Member
• Dr. Greg Byrd, Member

Statement dc:rights

• I hereby certify that, if appropriate, I have obtained and attached hereto a written permission statement from the owner(s) of each third party copyrighted matter to be included in my thesis, dissertation, or project report, allowing distribution as specified below. I certify that the version I submitted is the same as that approved by my advisory committee. I hereby grant to NC State University or its agents the non-exclusive license to archive and make accessible, under the conditions specified below, my thesis, dissertation, or project report in whole or in part in all forms of media, now or hereafter known. I retain all other ownership rights to the copyright of the thesis, dissertation or project report. I also retain the right to use in future works (such as articles or books) all or part of this thesis, dissertation, or project report.

Dc Identifier Other

etd-20010410-171850

OAI record oai:identifier

https://repository.lib.ncsu.edu/server/oai/request?verb=GetRecord&metadataPrefix=dim&identifier=oai%3Arepository.lib.ncsu.edu%3A1840.16%2F1653