Hole mobility in strained Ge/relaxed SiGe with a High-k/metal gate stack

The need for high speed and density in the modem semiconductor industry requires new channel materials and techniques for improved carrier transport and continuous scaling of the device dimensions. As a material for enhanced hole transport strained-Ge is implemented in this work. High-k dielectric and metal gate stack is used for improved electrostatic control, as an alternative to the unstable native oxides. The hole mobility of strained-Ge ring-FETs with and without Si cap and with A12 0 3/WN gate stack is investigated. The dependence of the mobility on the strained-Ge layer thickness and the silicon cap thickness is explored. Decrease of 13 % in the hole mobility is observed in the devices with thicker Ge channel suggesting partial relaxation of the strained-Ge. Removal of the Si cap results in almost 40 % decrease in hole mobility suggesting that the presence Si cap is required in realizing high mobility devices.

Department dc:contributor.department

Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science

Grantor dc:publisher

Massachusetts Institute of Technology

Year dc:date.issued

2011

Author dc:creator

• Polyzoeva, Evelina Aleksandrova

Advisor dc:contributor.advisor

• Dimitri A. Antoniadis.

• Electrical Engineering and Computer Science.

Statement dc:rights

• M.I.T. theses are protected by copyright. They may be viewed from this source for any purpose, but reproduction or distribution in any format is prohibited without written permission. See provided URL for inquiries about permission.

Licence dc:rights.uri

• http://dspace.mit.edu/handle/1721.1/7582

Language dc:language.iso

eng

Handle dc:identifier.uri

http://hdl.handle.net/1721.1/64597

OAI identifier oai:identifier

oai:dspace.mit.edu:1721.1/64597