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Massachusetts Institute of Technology

Wafer bonding for monolithic integration of Si CMOS VLSI electronics with III-V optoelectronic devices

Abstract

dc:description.abstract

GaAs-on-silicon epitaxy techniques as well as wafer bonding GaAs to Si, have been developed to overcome lattice mismatch in order to integrate optoelectronic and Si devices. However, the thermal expansion differences between these materials continues to be a limitation in using either of these approaches. After recognizing that Si devices, such as MOSFETs, are intrinsically thin and relatively strain tolerant, while optoelectronic devices, such as LEDs and lasers, are thick and very strain sensitive, this research was based on developing a better approach which involved bonding thin Si layers to thick GaAs substrates with various dielectric layers as the interface, to produce silicon-on-gallium arsenide (SonG) wafers. Such wafers are suitable for the fabrication of Si SOICMOS electronics and the subsequent monolithic integration of high performance optoelectronic devices. Future goals for this work include bonding fully processed SOI-CMOS wafers to the GaAs, rather than silicon wafers containing no electronics. With the successful development of SonG techniques for monolithic integration, it will be possible to use full-wafer and batch processing techniques for the production of sophisticated economically viable optoelectronic integrated circuits.

Degree

thesis:*
Department dc:contributor.department
Massachusetts Institute of Technology. Dept. of Electrical Engineering and Computer Science.
Grantor dc:publisher
Massachusetts Institute of Technology
Year dc:date.issued
1999

Author and committee

dc:creator, dc:contributor.*
Author dc:creator
  • London, Joanna M., 1974-
Advisor dc:contributor.advisor
  • Clifton G. Fonstad, Jr.

Subjects

dc:subject × 1

Rights

dc:rights
Statement dc:rights
  • M.I.T. theses are protected by copyright. They may be viewed from this source for any purpose, but reproduction or distribution in any format is prohibited without written permission. See provided URL for inquiries about permission.
Language dc:language.iso
eng

Identifiers

dc:identifier.*
Handle dc:identifier.uri
http://hdl.handle.net/1721.1/45498
OAI identifier oai:identifier
oai:dspace.mit.edu:1721.1/45498

Chain of custody

source
Harvested from
MIT
Base URL
dspace.mit.edu/oai/request
Last updated
2026-07-22
Source record
OAI-PMH GetRecord
citation

London, Joanna M., 1974-. Wafer bonding for monolithic integration of Si CMOS VLSI electronics with III-V optoelectronic devices. Massachusetts Institute of Technology, 1999. http://hdl.handle.net/1721.1/45498