Construction of a superconducting circuit simulator and its applications in cryogenic computing

In this work, I first construct a unified simulation platform, where superconducting electronics can be designed and optimized with high performance and accuracy. For this purpose, I first select numerical simulation methods that can deal with the highly non-linear characteristics of the superconducting devices. I validate the simulated responses with experimental data on device and circuit level examples. Following the implementation of the simulator, I use this framework to analyze existing superconducting nanowire based technologies, and optimize them for wider operation regimes and higher performance metrics. I use nanofabrication processes to realize these devices and conduct liquid helium immersion measurements to characterize them experimentally. Optimized devices show superior characteristics that demonstrate the predictive capabilities of this simulator. Finally, I use this simulator to design a superconducting nanowire based deep neural network training accelerator. I design, implement, and characterize a unit cell for this application. These local processors have significant device-level advantages over the readily available non-volatile memory technologies in realizing mixed-signal architectures. The devices produced throughout this work have immediate and near-term applications, proving the merit of having a high-performance simulator.

Name thesis:degree_name

Master

Department dc:contributor.department

Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science

Grantor dc:publisher

Massachusetts Institute of Technology

Year dc:date.issued

2019

Author dc:creator

• Onen, O. Murat(Oguzhan Murat)

Advisor dc:contributor.advisor

• Karl K. Berggren.

• Electrical Engineering and Computer Science.

Statement dc:rights

• MIT theses are protected by copyright. They may be viewed, downloaded, or printed from this source but further reproduction or distribution in any format is prohibited without written permission.

Licence dc:rights.uri

• http://dspace.mit.edu/handle/1721.1/7582

Language dc:language.iso

eng

Handle dc:identifier.uri

https://hdl.handle.net/1721.1/121740

OAI identifier oai:identifier

oai:dspace.mit.edu:1721.1/121740