Fault simulation for structural testing of analogue integrated circuits

In this thesis the ANTICS analogue fault simulation software is described which provides a statistical approach to fault simulation for accurate analogue IC test evaluation. The traditional figure of fault coverage is replaced by the average probability of fault detection. This is later refined by considering the probability of fault occurrence to generate a more realistic, weighted test metric. Two techniques to reduce the fault simulation time are described, both of which show large reductions in simulation time with little loss of accuracy. The final section of the thesis presents an accurate comparison of three test techniques and an evaluation of dynamic supply current monitoring. An increase in fault detection for dynamic supply current monitoring is obtained by removing the DC component of the supply current prior to measurement.

Name dc:type.qualificationname

PhD

Level dc:type.qualificationlevel

Doctoral

Grantor dc:publisher.institution

University of Hull

Year dc:date.issued

1998

Author dc:creator

• Spinks, Stephen James

• Electric apparatus and appliances
• Electronic apparatus and appliances
• Electric circuits
• Electronic circuits
• Computer software

Language dc:language

en

Identifier

oai:hull-repository.worktribe.com:4215056

OAI identifier oai:identifier

oai:hull-repository.worktribe.com:4215056