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Boise State University

SOC Reconfigurable Architecture for Software-Trained Neural Networks on FPGA

dc:creator Wasef, Michael

thesis:degree_name Doctor of Philosophy in Electrical and Computer Engineering

Degree

thesis:*

Name thesis:degree_name: Doctor of Philosophy in Electrical and Computer Engineering
Level thesis:degree_level: Dissertation

Author and committee

dc:creator, dc:contributor.*

Author dc:creator: Wasef, Michael
Contributors dc:contributor: Nader Rafla, Ph.D.
Kurtis Cantley, Ph.D.
Edoardo Serra, Ph.D.

Subjects

dc:subject × 7

Identifiers

dc:identifier.*

Repository record dc:identifier: https://scholarworks.boisestate.edu/td/2041
OAI record oai:identifier: https://scholarworks.boisestate.edu/do/oai/?verb=GetRecord&metadataPrefix=oai_etdms&identifier=oai%3Ascholarworks.boisestate.edu%3Atd-3174

Chain of custody

source

Harvested from: Boise State University
Base URL: scholarworks.boisestate.edu/do/oai/
Last updated: 2026-08-21
Source record: OAI-PMH GetRecord

related terms

citation

Wasef, Michael. SOC Reconfigurable Architecture for Software-Trained Neural Networks on FPGA. Dissertation thesis, https://scholarworks.boisestate.edu/td/2041

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